User description

Summary

Corrects SPI register address masking in busWriteBuf() to clear the MSB instead of setting it.

Problem

For SPI protocol, the MSB indicates read (1) or write (0) operations. The busWriteBuf() function incorrectly used reg | 0x80 which sets the MSB, when it should use reg & 0x7F to clear it for write operations.

This is inconsistent with the correct implementation in busWrite() at line 318.

Solution

Change line 286 from:

return spiBusWriteBuffer(dev, reg | 0x80, data, length);

To:

return spiBusWriteBuffer(dev, reg & 0x7F, data, length);

Impact

Current hardware: None - all devices using busWriteBuf() are I2C-based (VL53L0X, VL53L1X, MLX90393, TERARANGER_EVO, US42 rangefinders).

Future hardware: Prevents silent failures if SPI devices use multi-byte buffer writes.

This is a defensive fix for code correctness.

Fixes #10674

PR Type

Bug fix

Description

• Corrects SPI register masking in busWriteBuf() to clear MSB for writes

• Changes register operation from OR (0x80) to AND (0x7F) masking

• Aligns implementation with correct busWrite() function behavior

• Prevents future silent failures in SPI multi-byte buffer writes

Diagram Walkthrough

flowchart LR
  A["busWriteBuf SPI path"] --> B["Register masking operation"]
  B --> C["Previous: reg | 0x80 sets MSB"]
  B --> D["Fixed: reg & 0x7F clears MSB"]
  D --> E["Correct write operation"]
  C --> F["Incorrect read operation"]